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VND920P-E
DOUBLE CHANNEL HIGH SIDE DRIVER
TARGET SPECIFICATION
Table 1. General Features
TYPE VND920P-E RDS(on) 16m IOUT 35 A (*) VCC 36 V
Figure 1. Package
(*) Per channel with all the output pins connected to the PCB.
CMOS COMPATIBLE INPUT s PROPORTIONAL LOAD CURRENT SENSE s SHORTED LOAD PROTECTION s UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN s OVERVOLTAGE CLAMP s THERMAL SHUTDOWN s CURRENT LIMITATION s PROTECTION AGAINST LOSS OF GROUND AND LOSS OF VCC
s
SO-28 (DOUBLE ISLAND)
VERY LOW STAND-BY POWER DISSIPATION REVERSE BATTERY PROTECTION (**) s IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE
s s
DESCRIPTION The VND920P-E is a double chip device made by using STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table).
Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. Built-in analog current sense output delivers a current proportional to the load current. Device automatically turns off in case of ground pin disconnection.
Table 2. Order Codes
Package SO-28
Note: (**) See application schematic at page 12.
Tube VND920P-E
Tape and Reel VND920PTR-E
Rev. 1 October 2004 1/21 This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
VND920P-E
Figure 2. Block Diagram
VCC 1
VCC CLAMP
OVERVOLTAGE DETECTION UNDERVOLTAGE DETECTION
GND 1
Power CLAMP
DRIVER INPUT 1 LOGIC CURRENT LIMITER VDS LIMITER IOUT K OVERTEMPERATURE DETECTION CURRENT SENSE 1 OUTPUT 1
VCC 2 VCC CLAMP OVERVOLTAGE DETECTION UNDERVOLTAGE DETECTION GND 2 Power CLAMP
DRIVER INPUT 2 LOGIC CURRENT LIMITER VDS LIMITER IOUT K OVERTEMPERATURE DETECTION CURRENT SENSE 2 OUTPUT 2
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Table 3. Absolute Maximum Ratings
Symbol VCC - VCC - IGND IOUT - IOUT IIN VCSENSE DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current Current Sense Maximum Voltage Electrostatic Discharge R=1.5K; C=100pF) VESD - INPUT - CURRENT SENSE - OUTPUT - VCC Maximum Switching Energy EMAX Ptot Tj Tc TSTG (L=0.25mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=45A) Power Dissipation Tl25C Junction Operating Temperature Case Operating Temperature Storage Temperature 355 6.25 (**) Internally limited - 40 to 150 - 55 to 150 mJ W C C C (Human Body Model: 4000 2000 5000 5000 V V V V Parameter Value 41 - 0.3 - 200 Internally Limited - 21 +/- 10 -3 +15 Unit V V mA A A mA V V
Note: (**) Per island
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
VCC 1 GND 1 INPUT 1 CURRENT SENSE 1 NC NC VCC 1 VCC 2 GND 2 INPUT 2 CURRENT SENSE 2 NC NC VCC 2
Connection / Pin Floating To Ground
1
28
VCC1 OUTPUT 1 OUTPUT 1 OUTPUT 1 OUTPUT 1 OUTPUT 1 OUTPUT 1 OUTPUT 2 OUTPUT 2 OUTPUT 2 OUTPUT 2 OUTPUT 2 OUTPUT 2 VCC 2
Output X Input X Through 10K resistor
14
15
N.C. X X
Current Sense Through 1K resistor
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Figure 4. Current and Voltage Conventions
IS1 VCC1 IIN1 INPUT1 VIN1 CURRENT SENSE 1 IIN2 VIN2 INPUT2 IOUT2 OUTPUT2 VCC2 IOUT1 OUTPUT1 ISENSE1
IS2
VF1 (*)
VCC1
VCC2
VOUT1 VSENSE1
VOUT2 ISENSE2 VSENSE2
GROUND1
CURRENT SENSE 2 GROUND2 IGND1 IGND2
(*) VFn = VCCn - VOUTn during reverse battery condition
Table 4. Thermal Data
Symbol Rthj-case Rthj-amb Rthj-amb Parameter Thermal resistance junction-case Thermal resistance junction-ambient (one chip ON) Thermal resistance junction-ambient (two chips ON) (MAX) (MAX) (MAX) Value 15 55 (1) 46 (1) 45 (2) 32 (2) Unit C/W C/W C/W
Note: 1. When mounted on a standard single-sided FR-4 board with 1cm2 of Cu (at least 35m thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. Note: 2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35m thick) connected to all VCC pins. Horizontal mounting and no artificial air flow.
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VND920P-E
ELECTRICAL CHARACTERISTICS (8VSymbol VCC VUSD VOV RON Vclamp Parameter Operating Supply Voltage Undervoltage Shut-down Overvoltage Shut-down On State Resistance IOUT=10A; Tj =25C IOUT=10A IOUT=3A; VCC=6V Clamp Voltage ICC=20mA (See note 3) Off State; VCC=13V; VIN=VOUT=0V IS Supply Current Off State; VCC=13V; VIN=VOUT=0V; Tj =25C On State; VCC=13V; VIN=5V; IOUT=0A; RSENSE=3.9K IL(off1) IL(off2) IL(off3) IL(off4) Off State Output Current Off State Output Current Off State Output Current Off State Output Current VIN=VOUT=0V VIN=0V; VOUT=3.5V VIN=VOUT=0V; VCC=13V; Tj =125C VIN=VOUT=0V; VCC=13V; Tj =25C 0 -75 41 48 10 10 Test Conditions Min. 5.5 3 36 16 32 55 55 25 20 5 50 0 5 3 Typ. 13 4 Max. 36 5.5 Unit V V V m m m V A A mA A A A A
Note: 3. Vclamp and VOV are correlated. Typical difference is 5V.
Table 6. Switching (VCC =13V)
Symbol td(on) td(off) dVOUT/ dt(on) dVOUT/ dt(off) Parameter Turn-on Delay Time Turn-off Delay Time Turn-on Voltage Slope Test Conditions RL=1.3 (see figure 7) RL=1.3 (see figure 7) RL=1.3 (see figure 7) Min. Typ. 50 50 See relative diagram See relative diagram Max. Unit s s V/s
Turn-off Voltage Slope
RL=1.3 (see figure 7)
V/s
Table 7. VCC - Output Diode
Symbol VF Parameter Forward on Voltage Test Conditions -IOUT=5A; Tj=150C Min Typ Max 0.6 Unit V
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ELECTRICAL CHARACTERISTICS (continued) Table 8. Logic Input
Symbol VIL IIL VIH IIH VI(hyst) VICL Parameter Input Low Level Low Level Input Current Input High Level High Level Input Current Input Hysteresis Voltage Input Clamp Voltage IIN=1mA IIN=-1mA VIN=3.25V 0.5 6 6.8 -0.7 8 VIN=1.25V 1 3.25 10 Test Conditions Min. Typ. Max. 1.25 Unit V A V A V V V
Table 9. Protections (See note 4)
Symbol TTSD TR Thyst Ilim Vdemag VON Parameter Shut-down Temperature Reset Temperature Thermal Hysteresis DC Short Circuit Current Turn-off Output Clamp Voltage Output Voltage Drop Limitation VCC=13V 5VNote: 4. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles.
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ELECTRICAL CHARACTERISTICS (continued) Table 10. CURRENT SENSE (9V VCC 16V) (See Figure 6)
Symbol K1 dK1/K1 K2 dK2/K2 K3 dK3/K3 Parameter IOUT/ISENSE Current Sense Ratio Drift IOUT/ISENSE Current Sense Ratio Drift IOUT/ISENSE Current Sense Ratio Drift Analog Sense Leakage Current Test Conditions IOUT=1A; VSENSE=0.5V; Tj= -40C...150C IOUT=1A; VSENSE=0.5V; Tj= -40C...+150C IOUT=10A; VSENSE=4V; Tj=-40C Tj=25C...150C IOUT=10A; VSENSE=4V; Tj=-40C...+150C IOUT=30A; VSENSE=4V; Tj=-40C Tj=25C...150C IOUT=30A; VSENSE=4V; Tj=-40C...+150C VCC=6...16V; IOUT=0A;VSENSE=0V; Tj=-40C...+150C Min 3300 -10 4200 4400 -8 4200 4400 -6 4900 4900 4900 4900 Typ 4400 Max 6000 +10 6000 5750 +8 5500 5250 +6 % % % Unit
ISENSEO
0 2 4 5.5
10
A V V V
VSENSE VSENSEH
RVSENSEH
tDSENSE
Max Analog Sense Output VCC=5.5V; IOUT=5A; RSENSE=10K Voltage VCC>8V; IOUT=10A; RSENSE=10K Sense Voltage in Overtemperature VCC=13V; RSENSE=3.9K conditions Analog Sense Output Impedance in VCC=13V; Tj>TTSD; All channels open Overtemperature Condition Current sense delay to 90% ISENSE (see note 5) response
400
500
s
Note: 5. current sense signal delay after positive input slope
Figure 5.
OPEN LOAD STATUS TIMING (with external pull-up) IOUT < IOL VOUT> VOL VINn VINn
OVERTEMP STATUS TIMING Tj > TTSD
VSTAT n VSTAT n tSDL tDOL(off) tDOL(on) tSDL
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Figure 6. IOUT/ISENSE versus IOUT
IOUT/ISENSE
6500
6000
max.Tj=-40C
5500
max.Tj=25...150C
5000
min.Tj=25...150C
4500
typical value
4000
min.Tj=-40C
3500
3000 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32
IOUT (A)
Figure 7. Switching Characteristics (Resistive load RL=1.3)
VOUT
80% dVOUT/dt(on) tr ISENSE 90% 10%
90% dVOUT/dt(off) tf t
INPUT
tDSENSE
t td(off)
td(on)
t
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Figure 8. Switching time Waveforms
VOUT 90% 80%
dVOUT/dt(on) tr tf
dVOUT/dt(off)
10%
t VIN
td(on)
td(off)
t
Table 11. Truth Table (Per each channel)
CONDITIONS Normal operation INPUT L H L H L H L H L Short circuit to GND H H Short circuit to VCC Negative output voltage clamp L H L OUTPUT L H L L L L L L L L L H H L CURRENT SENSE 0 Nominal 0 VSENSEH 0 0 0 0 0 (TjTTSD) VSENSEH 0 < Nominal 0
Overtemperature
Undervoltage
Overvoltage
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VND920P-E
Table 12. Electrical Transient Requirements on VCC Pin
ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C C C C C C E E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 400 ms, 2
I C C C C C C
IV C C C C C E
CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
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VND920P-E
Figure 9. Waveforms
NORMAL OPERATION INPUTn LOAD CURRENTn SENSEn
UNDERVOLTAGE VCCn INPUTn LOAD CURRENTn SENSEn
VUSD VUSDhyst
OVERVOLTAGE
VOV
VCCn INPUTn LOAD CURRENTn SENSEn
VCC > VUSD
VOVhyst
SHORT TO GROUND INPUTn LOAD CURRENTn LOAD VOLTAGEn SENSEn
SHORT TO VCC INPUTn LOAD VOLTAGEn LOAD CURRENTn SENSEn
OVERTEMPERATURE Tj INPUTn LOAD CURRENTn SENSEn
ISENSE= VSENSEH RSENSE TTSD TR
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VND920P-E
Figure 10. Application Schematic
+5V Rprot INPUT1 VCC1 VCC2 Dld Rprot Rprot C. SENSE 1 INPUT2 OUTPUT1
C Rprot C. SENSE 2 OUTPUT2
GND1
GND2
RSENSE1,2 VGND
RGND DGND
GND PROTECTION REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / (IS(on)max). 2) RGND (-VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device's datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table.
C I/Os PROTECTION:
If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k.
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VND920P-E
Figure 11. Off State Output Current
IL(off1) (uA)
9 8 7 6 5 2.5 4 2 3 2 1 0 -50 -25 0 25 50 75 100 125 150 175 1.5 1 0.5 0 -50 -25 0 25 50 75 100 125 150 175
Figure 12. High Level Input Current
Iih (uA)
5 4.5
Vin=3.25V
4 3.5 3
Tc (C)
Tc (C)
Figure 13. Input Clamp Voltage
Vicl (V)
8 7.8
Figure 15. Input High Level
Vih (V)
3.6 3.4 3.2
Iin=1mA
7.6 7.4 7.2 7 6.8 6.6
3 2.8 2.6 2.4
6.4 6.2 6 -50 -25 0 25 50 75 100 125 150 175 2.2 2 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Figure 14. Input Low Level
Vil (V)
2.6 2.4 2.2
Figure 16. Input Hysteresis Voltage
Vhyst (V)
1.5 1.4 1.3 1.2
2 1.8 1.6 1.4
1.1 1 0.9 0.8 0.7
1.2 1 -50 -25 0 25 50 75 100 125 150 175
0.6 0.5 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
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VND920P-E
Figure 17. Overvoltage Shutdown
Vov (V)
50 48 46 44 42 40 38 36 34 32 30 -50 -25 0 25 50 75 100 125 150 175
Figure 18. ILIM Vs Tcase
Ilim (A)
100 90
Vcc=13V
80 70 60 50 40 30 20 10 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Figure 19. Turn-on Voltage Slope
dVout/dt(on) (V/ms)
700 650 600 550 500 450 400 350
Figure 21. Turn-off Voltage Slope
dVout/dt(off) (V/ms)
550 500
Vcc=13V Rl=1.3Ohm
450 400 350 300 250 200 150 100
Vcc=13V Rl=1.3Ohm
300 250 -50 -25 0 25 50 75 100 125 150 175
50 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Figure 20. On State Resistance Vs Tcase
Ron (mOhm)
50 45 40 35 30 25 20 15 10 5 0 -50 -25 0 25 50 75 100 125 150 175
Figure 22. On State Resistance Vs VCC
Ron (mOhm)
50 45
Iout=10A Vcc=8V; 36V
40 35
Tc= 150C
30 25 20
Tc= 25C
15 10
Tc= - 40C
5 0 5 10 15 20 25 30 35 40
Tc (C)
Vcc (V)
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Figure 23. Maximum turn off current versus load inductance
ILMAX (A) 100
A B
10
C
1 0.01 0.1 1 L(mH) 10 100
A = Single Pulse at TJstart=150C B= Repetitive pulse at TJstart=100C C= Repetitive Pulse at TJstart=125C Conditions: VCC=13.5V Values are generated with R L=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C.
VIN, IL Demagnetization Demagnetization Demagnetization
t
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VND920P-E
SO-16L Thermal Data Figure 24. SO-28 DOUBLE ISLAND PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: 0.5cm2, 3cm2, 6cm2).
Table 13. Thermal calculation according to the PCB heatsink area
Chip 1 ON OFF ON ON Chip 2 OFF ON ON ON Tjchip1 RthA x Pdchip1 + Tamb RthC x Pdchip2 + Tamb RthB x (Pdchip1 + Pdchip2) + Tamb (RthA x Pdchip1) + RthC x Pdchip2 + Tamb Tjchip2 Note RthC x Pdchip1 + Tamb RthA x Pdchip2 + Tamb RthB x (Pdchip1 + Pdchip2) + Tamb Pdchip1=Pdchip2 (RthA x Pdchip2) + RthC x Pdchip1 + Tamb Pdchip1Pdchip2
Note:RthA = Thermal resistance Junction to Ambient with one chip ON Note:RthB = Thermal resistance Junction to Ambient with both chips ON and Pdchip1=Pdchip2 Note:RthC = Mutual thermal resistance
Figure 25. Rthj-amb Vs PCB copper area in open box free air condition
RTHj_am b (C/W) 70 60 50 40
RthB RthA
30 20 10 0 1 2 3 4 5 PCB Cu heatsink area (cm ^2)/island 6 7
RthC
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Figure 26. SO-28 Thermal Impedance Junction Ambient Single Pulse
Zth (C /W )
100
0,5 cm ^2/is lan d 3 cm ^2/is lan d
6 cm ^2/is lan d
10
1
One c hannel ON Tw o c hannels ON
0.1
0.01 0.0001
0.001
0.01
0.1 tim e(s)
1
10
100
1000
Figure 27. Thermal fitting model of a two channels HSD in SO-28
Pulse calculation formula
Z TH = R TH + Z THtp ( 1 - )
where
= tp T
Table 14. Thermal Parameter
Tj_1
Pd1 C1 C2 C1 C2 C3 C4 C5 C6
R1
R2
R3
R4
R5
R6
Tj_2
R1 Pd2
R2
T_amb
Area/island (cm2) R1= (C/W) R2= (C/W) R3= (C/W) R4= (C/W) R5= (C/W) R6= (C/W) C1= (W.s/C) C2= (W.s/C) C3= (W.s/C) C4= (W.s/C) C5= (W.s/C) C6= (W.s/C)
0.5 0.02 0.1 2.2 11 15 30 0.0015 7.00E-03 1.50E-02 0.2 1.5 5
6
13
8
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PACKAGE MECHANICAL Table 15. SO-28 Mechanical Data
Symbol A a1 b b1 C c1 D E e e3 F L S 7.40 0.40 8 (max.) 17.7 10.00 1.27 16.51 7.60 1.27 0.10 0.35 0.23 0.50 45 (typ.) 18.1 10.65 millimeters Min Typ Max 2.65 0.30 0.49 0.32
Figure 28. SO-28 Package Dimensions
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Figure 29. SO-28 TUBE SHIPMENT (no suffix)
C B
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1)
All dimensions are in mm.
28 700 532 3.5 13.8 0.6
A
Figure 30. TAPE AND REEL SHIPMENT (suffix "TR") REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 16.4 60 22.4
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 16 4 12 1.5 1.5 7.5 6.5 2
End
All dimensions are in mm.
Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components
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REVISION HISTORY Table 16. Revision History
Date Oct. 2004 Revision 1 First Issue Description of Changes
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com
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